Technical Field
The present invention relates to a method for manufacturing a high-performance and low-power field effect transistor element of which surface roughness scattering is minimized or removed, and particularly, to a method for manufacturing a high-performance and low-power field effect transistor element of which surface roughness scattering is minimized or removed, which stacks and etches undoped and doped SiGe on strained silicon and stacks an oxide and a gate metal while using the doped SiGe as a source/drain in order to take high electron mobility which is an advantage of an HEMT as a high-performance semiconductor device by enhancing low mobility of electrons due to surface roughness scattering which is a disadvantage of a multi-gate low-power semiconductor device having high gate control power, such as a FinFET and enhance gate leakage current which is the disadvantage of the HEMT, and the like.
Background Art
Performance of a transistor has been improved through scaling of a device size and low-cost, high-integration, low-power, and high-speed circuit can be manufactured through scaling by researches in the related art, but a flat silicon MOSFET which is a transistor which has been primarily used has been limited in scaling while a short-channel effect has been intensified as the size of the MOSFET becomes 32 nm or less.
In order to enhance such a performance deterioration phenomenon, a stereoscopic structure semiconductor device which is known as a multi-gate MOSFET or FinFET has been developed.
In the case of the multi-gate MOSFET, since multiple gates surround a channel area, a gate field-effect exerts a large influence on the channel area. Therefore, the multi-gate MOSFET can acquire higher driving current than the flat MOSFET and further, control power of a gate for a channel on which current flows which is one of the core elements for determining the performance of the transistor is improved to suppress the short-channel effect.
As a capacity of a dielectric that insulates the gate and the channel increases and the thickness of a body decreases, the control power of the gate increases. To this end, as a new-structure transistor using a thin body, a FinFET and a UTBSOI are representatively provided.
Research into the FinFET as a promising candidate that will succeed the flat transistor in the related art between the FinFET and the UTBSOI is in active progress. Representatively, US Intel Corporation released a chip to which 22 nm FinFET process technology is applied in 2012, and the like, therefore, an importance thereof has increased. However, the FinFET has a disadvantage that mobility of electrons is lower due to surface roughness scattering than high channel controllability.
Unlike the FinFET, a high electron mobility transistor (HEMT) has an advantage that the surface roughness scattering is suppressed by not a channel electron organic scheme by gate voltage but a quantum well channel scheme in which channel electrons have already been collected to show the high electron mobility, but a disadvantage that gate leakage current and off-current are relatively higher. Further, since various materials including an undoped spacer and a channel material are inserted in order to fabricate a quantum well, high parasitic resistance is generated between a source and a drain and a process is complicated.
With the development of strained silicon, research into a silicon-based strained silicon HEMT is also in progress. However, as a capping layer of the strained silicon HEMT, general silicon which does not have a large band gap difference is used, and as a result, high off-current is generated. As a result, on and off cannot be distinguished and the HEMT cannot be driven as the transistor.